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Institut für Technische Informatik

Open Seminar

Druckansicht
 
The seminar takes place on the appointed date and time in the ITI seminar room (3.175), ETI I, Pfaffenwaldring 47.

Previous talks:

  • Monday, September 13, 2010, 9:45 - 11:00 a. m.

    Rauf Salimi Khaligh

    Institut für Technische Informatik

    Anatomy of a high-performance system-level simulator

    This presentation gives a detailed overview of the architectural aspects of the NATSIM simulation kernel. The current state of the kernel is presented and future plans will be put up for discussion.


  • Friday, August 6, 2010, 4:30 - 5:15 p. m., Söllerhaus, Kleinwalsertal

    Rauf Salimi Khaligh

    Institut für Technische Informatik


    Anatomy of a high-performance system-level simulator

    This presentation gives a detailed overview of the architectural aspects of the NATSIM simulation kernel. The current state of the kernel is presented and future plans will be put up for discussion.


  • Friday, August 6, 2010, 3:00 - 3:45 p. m., Söllerhaus, Kleinwalsertal

    Weiyun Lu

    Institut für Technische Informatik


    CCS fault simulation with SystemC

    Following previous talk, new simulation results will be presented. And the simulation mechanism will be presented in a more systematic and detailed way. Possible future works will be discussed.


  • Thursday, August 5, 2010, 3:00 - 3:45 p. m., Söllerhaus, Kleinwalsertal

    Gert Schley

    Institut für Technische Informatik


    The presentation takes place at Söllerhaus, Kleinwalsertal, as part of the Embedded Systems Department meeting.


    Distribution of privileged nodes in Network-on-Chip topologies (PPT)

    In this talk, results for distributing privileged nodes in certain NoC topologies are presented. In addition, some implementation details of the analyzer tool are given. Based on these results, decisions for possible further work are presented which are put to discussion at the end of presentation.


  • Thursday, August 5, 2010, 4:30 - 5:15 p. m., Söllerhaus, Kleinwalsertal

    Hongzhang Chen

    Institut für Technische Informatik


    Implementation detail and result of high level fault modeling for a general purpose FIFO (PPTX)

    Presentation of the detail and result for developing fault models in SystemC for a FIFO and the implementation of the algorithms manipulating fault dictionary.


  • Wednesday, August 4, 2010, 4:30 - 5:15 p. m., Söllerhaus, Kleinwalsertal

    Adan Kohler

    Institut für Technische Informatik

    Towards reliable and efficient distributed on-chip computing (PPTx)

    Following up to previous talks on that topic, the ideas for efficient collective communication in NoCs are further elaborated. In addition, the individual techniques shall be put into wider scope to form an infrastructure that provides reliable computing services for distributed applications.


  • Wednesday, August 4, 2010, 3:00 - 3:45 p. m., Söllerhaus, Kleinwalsertal

    Bastian Haetzer

    Institut für Technische Informatik

    Simulation of Xilinx FPGA Reconfiguration Architecture

    In this Presentation, the xilinx FPGA reconfiguration architecture details along with ideas of modeling them will be discussed. Related work in this field will also be shown.


  • Monday, June 28, 2010, 9:45 - 11:00 a. m.

    Adan Kohler

    Institut für Technische Informatik

    A Node Ordering Scheme for Efficient Many-to-One Communication (PPT)

    Many distributed computing techniques follow a "three phase" approach: In the first phase, the input data present at some dedicated node (i.e. the root node) is partitioned and sent to a set of worker nodes. In the second phase, each worker node processes its local portion of data. Finally, in the third phase, the partial results of the worker nodes are sent back to the root.
    In this talk, I want to present and discuss ideas for an optimized ordering of nodes to improve the communication in the third phase.


  • Friday, June 25, 2010, 9:45 - 11:00 a. m.

    Hongzhang Chen

    Institut für Technische Informatik

    How to make the work process automatic (PPT)

    Presentation of work plan to develop a tool chain, which can build fault models automatically for different hardware components.


  • Monday, June 14, 2010, 9:45 - 11:00 a. m.

    Weiyun Lu

    Institut für Technische Informatik

    A primitive concurrent and comparative SystemC fault simulator (PPT)

    A primitive concurrent and comparative (CCS) fault simulator is implemented in SystemC. The implementation detail and the test result on a fir filter design were presented along with a Demo.


  • Monday, May 17, 2010, 9:45 - 11:00 a. m.

    Gert Schley, M.Sc.

    Institut für Technische Informatik

    Optimale Anordnung von Cluster Managern in NoC-Topologien

    Presentation of work status and first results





Previous open seminars