Name:	Dipl.-Inf. Stefan Holst
	Address:	Institut für Technische Informatik Pfaffenwaldring 47 D-70569 Stuttgart Germany
	Phone:	+49 711 7816 279
	Fax:	+49 711 7816 288
	Room:	3.164
	E-Mail:	holst@informatik.uni-stuttgart.de

Available Topics for DA/SA/MT or SoPras

• Defekt-Simulation zur Validierung von Test- und Diagnosealgorithmen

Projects

	DIADEM: Eingebettete Diagnose- und Debugmethoden für VLSI Systeme in Nanometer-Technologie Modern manufacturing processes are subject to high variations and a high sensitivity during operation. This project addresses the need for innovative embedded diagnosis solutions for such systems to reduce time-to-market with reasonable costs.

MAYA:  Neue Methoden für den Massiv-Parallel-Test im Hochvolumen, Yield Learning und beste Testqualität High-end digital circuits need a very large amount of test vectors. Given such high data volumes, test cost is predicted to explode by a factor of 120. This project addresses this challenge by developing and integrating innovative technology for generating and capturing data on-chip. Project Partner: NXP Semiconductors, Hamburg

Publications

• Adaptive Debug and Diagnosis Without Fault Dictionaries
  S. Holst, H.-J. Wunderlich
  12th IEEE European Test Symposium (ETS), Freiburg, Germany, May 21-24, 2007 Best Paper
  
  
• Debug and Diagnosis: Mastering the Life Cycle of Nano-Scale Systems on Chip
  H.-J. Wunderlich, M. Elm, S. Holst
  43rd International Conference on Microelectronics, Devices and Material with the Workshop on Electronic Testing (MIDEM'07), Bled, Slovenia, September 12-14, 2007, pp. 27-36
  
  

Workshop Contributions

• Adaptive Debug and Diagnosis Without Fault Dictionaries
  S. Holst, H.-J. Wunderlich
  TG/GI/GMM Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", Erlangen, Germany, March 11-13, 2007
  
  

Teaching

SS 2006:	Algorithmen und Methoden zur Entwurfsautomatisierung in der Nano- und Mikroelektronik
	(Haupt-)Seminar: Designing High Performant Systems: Statistical Timing Analysis and Optimization
WS 2006:	Grundlagen der Rechnerarchitektur
SS 2007:	Algorithmen und Methoden zur Entwurfsautomatisierung in der Nano- und Mikroelektronik
	Advanced Processor Architecture
	(Haupt-)Seminar: Algorithms for Design-Automation - Mastering Nanoelectronic Systems
	Master Thesis: Eclipse Based Frontend to Layout Navigation for Precision Diagnosis
WS 2007:	Grundlagen der Rechnerarchitektur
	Conception and Implementation of EDA Tools
	SoPra: pop2pc
SS 2008:	Algorithmen und Methoden zur Entwurfsautomatisierung in der Nano- und Mikroelektronik
	Hardware-Praktikum
	Studienarbeit: Evaluation kommerzieller Werkzeuge zur Diagnose von fehlerhaften Chips
WS 2008:	Advanced Processor Architecture
	Grundlagen der Rechnerarchitektur

π