# ../../../vl2mv/i586/bin/vl2mv demo.v 
# version: 0.2
# date:    23:51:02 08/01/00 (CEST)
.model accu 
# I/O ports
.outputs out<0> out<1> out<2> out<3> out<4> 
.inputs in
# assign out  = acc 
.names _n1<0> out$raw_n0<4>
- =_n1<0>
.names _n1<1> out$raw_n0<3>
- =_n1<1>
.names _n1<2> out$raw_n0<2>
- =_n1<2>
.names _n1<3> out$raw_n0<1>
- =_n1<3>
.names _n1<4> out$raw_n0<0>
- =_n1<4>
.names acc<0> _n1<0>
- =acc<0>
.names acc<1> _n1<1>
- =acc<1>
.names acc<2> _n1<2>
- =acc<2>
.names acc<3> _n1<3>
- =acc<3>
.names acc<4> _n1<4>
- =acc<4>
# acc  = 2
.names _n3<0> acc$raw_n2<4>
- =_n3<0>
.names _n3<1> acc$raw_n2<3>
- =_n3<1>
.names _n3<2> acc$raw_n2<2>
- =_n3<2>
.names _n3<3> acc$raw_n2<1>
- =_n3<3>
.names _n3<4> acc$raw_n2<0>
- =_n3<4>
.names _n3<0>
0
.names _n3<1>
1
.names _n3<2>
0
.names _n3<3>
0
.names _n3<4>
0
# non-blocking assignments for initial
# creg  = 2
.names _n5<0> creg$raw_n4<4>
- =_n5<0>
.names _n5<1> creg$raw_n4<3>
- =_n5<1>
.names _n5<2> creg$raw_n4<2>
- =_n5<2>
.names _n5<3> creg$raw_n4<1>
- =_n5<3>
.names _n5<4> creg$raw_n4<0>
- =_n5<4>
.names _n5<0>
0
.names _n5<1>
1
.names _n5<2>
0
.names _n5<3>
0
.names _n5<4>
0
# non-blocking assignments for initial
# acc  = acc  + creg 
.names _n7<0> acc$raw_n6<4>
- =_n7<0>
.names _n7<1> acc$raw_n6<3>
- =_n7<1>
.names _n7<2> acc$raw_n6<2>
- =_n7<2>
.names _n7<3> acc$raw_n6<1>
- =_n7<3>
.names _n7<4> acc$raw_n6<0>
- =_n7<4>
# acc  + creg 
.names _n9
0
.names acc<0> creg<0> _n9 _n8<0>
.def 0
0 0 1 1
0 1 0 1
1 0 0 1
1 1 1 1
# carry/borrow
.names _nb
0
.names acc<0> creg<0> _nb _na
.def 0
0 1 1 1
1 0 1 1
1 1 0 1
1 1 1 1
.names acc<1> creg<1> _na _n8<1>
.def 0
0 0 1 1
0 1 0 1
1 0 0 1
1 1 1 1
# carry/borrow
.names acc<1> creg<1> _na _nc
.def 0
0 1 1 1
1 0 1 1
1 1 0 1
1 1 1 1
.names acc<2> creg<2> _nc _n8<2>
.def 0
0 0 1 1
0 1 0 1
1 0 0 1
1 1 1 1
# carry/borrow
.names acc<2> creg<2> _nc _nd
.def 0
0 1 1 1
1 0 1 1
1 1 0 1
1 1 1 1
.names acc<3> creg<3> _nd _n8<3>
.def 0
0 0 1 1
0 1 0 1
1 0 0 1
1 1 1 1
# carry/borrow
.names acc<3> creg<3> _nd _ne
.def 0
0 1 1 1
1 0 1 1
1 1 0 1
1 1 1 1
.names acc<4> creg<4> _ne _n8<4>
.def 0
0 0 1 1
0 1 0 1
1 0 0 1
1 1 1 1
.names _n8<0> _n7<0>
- =_n8<0>
.names _n8<1> _n7<1>
- =_n8<1>
.names _n8<2> _n7<2>
- =_n8<2>
.names _n8<3> _n7<3>
- =_n8<3>
.names _n8<4> _n7<4>
- =_n8<4>
# creg  = {in , creg [0 : 5 - 2]}
.names _n10<0> creg$raw_nf<4>
- =_n10<0>
.names _n10<1> creg$raw_nf<3>
- =_n10<1>
.names _n10<2> creg$raw_nf<2>
- =_n10<2>
.names _n10<3> creg$raw_nf<1>
- =_n10<3>
.names _n10<4> creg$raw_nf<0>
- =_n10<4>
.names in _n11<0>
- =in
.names _n12
0
.names creg<0> _n13<3>
- =creg<0>
.names creg<1> _n13<2>
- =creg<1>
.names creg<2> _n13<1>
- =creg<2>
.names creg<3> _n13<0>
- =creg<3>
.names _n13<0> _n11<1>
- =_n13<0>
.names _n13<1> _n11<2>
- =_n13<1>
.names _n13<2> _n11<3>
- =_n13<2>
.names _n13<3> _n11<4>
- =_n13<3>
.names _n11<0> _n10<0>
- =_n11<0>
.names _n11<1> _n10<1>
- =_n11<1>
.names _n11<2> _n10<2>
- =_n11<2>
.names _n11<3> _n10<3>
- =_n11<3>
.names _n11<4> _n10<4>
- =_n11<4>
# conflict arbitrators
.names _n14
.def 0
 1
.names _n14 acc$raw_n6<0> acc$raw_n6<1> acc$raw_n6<2> acc$raw_n6<3> acc$raw_n6<4> -> _n15<0> _n15<1> _n15<2> _n15<3> _n15<4> 
.def 0 0 0 0 0
1 - - - - - =acc$raw_n6<0> =acc$raw_n6<1> =acc$raw_n6<2> =acc$raw_n6<3> =acc$raw_n6<4> 
.names out$raw_n0<0>  out<0>
- =out$raw_n0<0>
.names out$raw_n0<1>  out<1>
- =out$raw_n0<1>
.names out$raw_n0<2>  out<2>
- =out$raw_n0<2>
.names out$raw_n0<3>  out<3>
- =out$raw_n0<3>
.names out$raw_n0<4>  out<4>
- =out$raw_n0<4>
.names _n16
.def 0
 1
.names _n16 creg$raw_nf<0> creg$raw_nf<1> creg$raw_nf<2> creg$raw_nf<3> creg$raw_nf<4> -> _n17<0> _n17<1> _n17<2> _n17<3> _n17<4> 
.def 0 0 0 0 0
1 - - - - - =creg$raw_nf<0> =creg$raw_nf<1> =creg$raw_nf<2> =creg$raw_nf<3> =creg$raw_nf<4> 
# non-blocking assignments 
# latches
.r acc$raw_n2<0> acc<0>
.def 0
1 1
.r acc$raw_n2<1> acc<1>
.def 0
1 1
.r acc$raw_n2<2> acc<2>
.def 0
1 1
.r acc$raw_n2<3> acc<3>
.def 0
1 1
.r acc$raw_n2<4> acc<4>
.def 0
1 1
.latch _n15<0> acc<0>
.latch _n15<1> acc<1>
.latch _n15<2> acc<2>
.latch _n15<3> acc<3>
.latch _n15<4> acc<4>
.r creg$raw_n4<0> creg<0>
.def 0
1 1
.r creg$raw_n4<1> creg<1>
.def 0
1 1
.r creg$raw_n4<2> creg<2>
.def 0
1 1
.r creg$raw_n4<3> creg<3>
.def 0
1 1
.r creg$raw_n4<4> creg<4>
.def 0
1 1
.latch _n17<0> creg<0>
.latch _n17<1> creg<1>
.latch _n17<2> creg<2>
.latch _n17<3> creg<3>
.latch _n17<4> creg<4>
# quasi-continuous assignment
.end